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       W631GG6KB


Part No

Voltage

Speed

Temperature

Organization

W631GG6KB

1.5V±0.075V

1866/1600/1333Mbps

C-temp, I-temp, Automotive

64Mbit x16 8 Banks


Power Supply: VDD, VDDQ = 1.5 V ± 0.075 V 
Double Data Rate architecture: two data transfers per clock cycle  
CAS Latency: 6, 7, 8, 9,10,11 and 13  
Differential clock inputs (CK and /CK# ) 
Read Latency = Additive Latency plus CAS Latency (RL = AL + CL) 
Auto-precharge operation for read and write bursts  
Precharged Power Down and Active Power Down 
Data masks (DM) for write data 
Programmable CAS Write Latency (CWL) per operating frequency 
Write Latency WL = AL + CWL 
2K Byte page size 
Interface: SSTL_15